Features: SpecificationsDescription The 2SK2361/2SK2362 is N-Channel MOS Field Effect Transistor designed for high voltage switching applications.The 2SK2361/2SK2362 has 3 features including Low on-resistance,2SK2359: RDS(on) = 0.9 (VGS = 10 V, ID = 4.0 A),2SK2360: RDS(on) = 1.0 (VGS = 10 V, ID = ...
2SK2361/2SK2362: Features: SpecificationsDescription The 2SK2361/2SK2362 is N-Channel MOS Field Effect Transistor designed for high voltage switching applications.The 2SK2361/2SK2362 has 3 features including Low on-...
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Features: High Speed SwitchingLow On-ResistanceNo Secondary BreakdownLow Driving PowerHigh Voltage...
Features: - High Speed Switching- Low On-Resistance- No Secondary Breakdown- Low Driving Power- Hi...
The 2SK2361/2SK2362 is N-Channel MOS Field Effect Transistor designed for high voltage switching applications.The 2SK2361/2SK2362 has 3 features including Low on-resistance,2SK2359: RDS(on) = 0.9 (VGS = 10 V, ID = 4.0 A),2SK2360: RDS(on) = 1.0 (VGS = 10 V, ID = 4.0 A);Low Ciss Ciss = 1050 pF TYP;High Avalanche Capability Ratings.
The absolute maximun ratings of the 2SK2361/2SK2362 are at Ta=25°C, Drain to source voltage(2SK2361/2SK2362) VDSS is 450/500V;Gate to source voltage VGSS is 30V;drain Current ID(DC) is 10A;total power dissipation is 100W;channel temperature is 150°C maxnimum;Storage temperature is -55 to +150°C.
The 2SK2362 is fabricated in Vishay Siliconixs proprietary HVSG-2 CMOS process, resulting in higher speed and lower power consumption. An epitaxial layer prevents latchup. Each switch conducts equally well in both directions when on. When off, they block voltages up to the power-supply levels. The increment/decrement command is different from the other commands. Once the command is issued and the 2SK2362 has responded with an acknowledge, the master can clock the selected wiper up and/or down in one segment steps; thereby, providing a fine tuning capability to the host. For each SCL clock pulse (tHIGH) while SDA is HIGH, the selected wiper will move one resistor segment towards the VH terminal. Similarly, for each SCL clock pulse while SDA is LOW, the selected wiper will move one resistor segment towards the VL terminal. A detailed illustration of the sequence for this operation is shown in Figure 5.The small package saves space on pc boards, and enables the design of small portable electronic devices. It also allows the designer to place the device closer to the signal source to reduce noise pickup and increase signal integrity. The chips are built with Nationals advanced submicron silicon-gate BiCMOS process.
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.
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