DescriptionThe 2SC3638 is NPN triple diffused planar silicon transistor VERY high-definition display horizontal deflection output applications. It has 4 features including high reliability(adoption of HVP process;fast speed;high breakdown voltage;adoption of MBIT process. The absolute maximun rati...
2SC3638: DescriptionThe 2SC3638 is NPN triple diffused planar silicon transistor VERY high-definition display horizontal deflection output applications. It has 4 features including high reliability(adoption ...
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The 2SC3638 is NPN triple diffused planar silicon transistor VERY high-definition display horizontal deflection output applications. It has 4 features including high reliability(adoption of HVP process;fast speed;high breakdown voltage;adoption of MBIT process.
The absolute maximun ratings at Ta=25°C, Collector to Base Voltage VCBO is 900 V;Collector to Emitter Voltage VCEO is 500 V;Emitter to Base Voltage VEBO is 7 V;Collector Current IC is 15A;Junction temperature 150°C;Storage temperature is -55 to +150°C ;collector dissipation is 100 W;peak collector current iCP is 25A etc.
The Cypress 2SC3638 FTG Development Kit comes complete with everything needed to design with the 2SC3638 and program samples and small prototype quantities. The kit comes with the latest version of CyClocksRT and a small portable programmer that connects to a PC serial port for on-the-fly programming of custom frequencies
The Fairchild Semiconductor is a high efficiency driver amplifier designed for use in point to point and point to multi-point radios, and various communi- cations applications. The 2SC3638 is a 3-stage GaAs MMIC amplifier utilizing our advanced 0.15µm gate length Power PHEMT process and can be used in conjunction with other driver or power amplifiers to achieve the required total power output. The individual GPI pins can be used for additional board flexibility. The state of the GPI pins can be read, using the FWH/LPC interface, through the GPI register. The GPI pins should be at their desired state before the start of the PCI clock cycle during which the read is attempted, and they should remain at the same level until the end of the read cycle. The voltages applied to the GPI pins must comply with the devices VIH and VIL requirements. Any unused GPI pins must not be left floating. These pins are used as the A[10:6] pins in the A/A Mux interface.
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