29PL256N

Features: WP#/ACC (Write Protect/Acceleration) Input At VIL, hardware level protection for the first and last two 32 Kword sectors. At VIH, allows the use of DYB/PPB sector protection At VHH, provides accelerated programming in a factory setting Dual Boot and No Boot Options Low VCC Write Inhibit...

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SeekIC No. : 004218367 Detail

29PL256N: Features: WP#/ACC (Write Protect/Acceleration) Input At VIL, hardware level protection for the first and last two 32 Kword sectors. At VIH, allows the use of DYB/PPB sector protection At VHH, provi...

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Part Number:
29PL256N
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/8/31

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Product Details

Description



Features:

  WP#/ACC (Write Protect/Acceleration) Input
At VIL, hardware level protection for the first and last two 32 Kword sectors.
At VIH, allows the use of DYB/PPB sector protection
At VHH, provides accelerated programming in a factory setting
  Dual Boot and No Boot Options
  Low VCC Write Inhibit Security Features
 Persistent Sector Protection
A command sector protection method to lock combinations of individual sectors to prevent program or erase operations within that sector
Sectors can be locked and unlocked in-system at VCC level
 Password Sector Protection
A sophisticated sector protection method locks combinations of individual sectors to prevent program or erase operations within that sector using a user defined 64-bit password





Specifications

Storage Temperature, Plastic Packages 65 to +150
Ambient Temperature with Power Applied 65 to +125
Voltage with Respect to Ground:
All Inputs and I/Os except as noted below (Note 1)
0.5 V to VIO + 0.5 V
VCC (Note 1) 0.5 V to +4.0 V
VIO (Note 1) 0.5 V to +4.0V
ACC (Note 2) 0.5 V to +10.5 V
Output Short Circuit Current (Note 3) 200 mA

Notes
1. Minimum DC voltage on input or I/Os is 0.5 V. During voltage transitions, inputs or I/Os may  ndershoot VSS to 2.0 V for periods of up to 20 ns. See Figure 11.1 on page 54. Maximum DC voltage on input or I/Os is VCC + 0.5 V. During voltage transitions outputs may overshoot to VCC + 2.0 V for periods up to 20 ns. See Figure 11.2 on page 54.

2. Minimum DC input voltage on pin WP#⁄ACC is 0.5 V. During voltage transitions, WP#⁄ACC may overshoot VSS to 2.0 V for periods of up to 20 ns. See Figure 11.1 on page 54. Maximum DC voltage on pin WP#⁄ACC is +9.5 V, which may overshoot to 10.5 V for periods up to 20 ns.

3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.

4. Stresses above those listed under Absolute Maximum Ratings on page 54 may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.






Description

The Spansion Family Name is the latest generation 3.0-Volt page mode read family fabricated using the 110 nm MirrorbitTM Flash process technology.  29PL256N are capable of performing simultaneous read and write operations with zero latency on two separate banks. These devices offer fast page access times of 25 to 30 ns, with corresponding random access times of 65 ns, 70 ns, and 80 ns respectively, allowing high speed microprocessors to operate without wait states. The S29PL129N device offers the additional feature of dual chip enable inputs (CE1# and CE2#) that allow each half of the memory space to be controlled separately.






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