25AA080

Features:

* 3 MHz Clock Rate
* SPI Modes 0,0 and 1,1.
* Single supply with programming operation down to 1.8V
* Low Power CMOS Technology
   - Max Write Current: 5 mA
   - Read Current: 1.0 mA
   - Standby Current: 1 m A typical
* Organization
   - 1024 x 8 for 25AA080
   - 2048 x 8 for 25AA160
* 16 Byte Page
* Self-timed ERASE and WRITE Cycles
* Sequential Read
* Block Write Protection
   - Protect none, 1/4, 1/2, or all of Array
* Built-in Write Protection
   - Power On/Off Data Protection Circuitry
   - Write Latch
   - Write Protect Pin
* High Reliability
   - Endurance: 10M cycles (guaranteed)
   - Data Retention: >200 years
   - ESD protection: >4000 V
* 8-pin PDIP/SOIC Packages
* Temperature ranges supported
   - Commercial (C): 0 C to +70 C
   - Industrial (I): -40 C to +85 C


Pinout




Specifications

VCC .......................................................................7.0V
All inputs and outputs w.r.t.......VSS-0.6V to VCC +1.0V
Storage temperature.............................-65?C to 150?C
Ambient temperature under bias...........-65?C to 125?C
Soldering temperature of leads (10 seconds)...+300?C
ESD protection on all pins......................................4kV
*Notice: Stresses above those listed under 'Maximum ratings'may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maxi-mum rating conditions for extended period of time may affect device reliability.


Description

The Microchip Technology Inc. 25AA080/160 are 8K and 16K bit Serial Electrically Erasable PROMs. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to 25AA080/160 is controlled through a chip select (CS) input, allowing any number of devices to share the same bus.

There are two other inputs that provide the end user with additional flexibility. Communication to the device can be paused via the hold pin (HOLD). While 25AA080/160 is paused, transitions on its inputs will be ignored, with the exception of chip select, allowing the host to service higher priority interrupts. Also write operations to the Status Register can be disabled via the write protect pin (WP).