Features: • Flash ROM interface• PCI Revision 2.1 compliant interface (32 bit, 33 MHz)• DAC support (for Rev_ID 4 or higher)• Enhanced parity support (for Rev_ID 4 or higher)• Power Management Support (for Rev_ID 4 or higher)• DMA controllers• Interrupt co...
21285: Features: • Flash ROM interface• PCI Revision 2.1 compliant interface (32 bit, 33 MHz)• DAC support (for Rev_ID 4 or higher)• Enhanced parity support (for Rev_ID 4 or higher)...
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Parameter |
Minimum |
Maximum |
Junction temperature,Tj |
- |
125 |
Supply Voltage, Vdd |
- |
3.9 V |
Maximum voltage applied to signal pins |
- |
5.5 V |
Maximum power PWC |
- |
1.77 W @ 33 MHz |
Storage temperature range, Tstg |
-55 |
125 |
Intel Semiconductor's 21285 is a single-chip interface between an SA-110 microprocessor, synchronous DRAM memory (SDRAM), read-only memory (ROM), and the PCI bus. It is designed to support the following three modes of operation:
• PCI-based SA-110 computer. In this configuration, the SA-110 processor is the host Intelprocessor. It configures all PCI peripherals in the system.
• Attached processor. In this configuration, the SA-110 processor system interfaces directly to the host system PCI bus. The 21285 is configured by the host processor in the system.
• Intelligent add-in card. In this configuration, the SA-110 processor controls a PCI-based subsystem that is designed to be plugged into a host system PCI slot. Normally, a PCI-to-PCI bridge device interfaces the oncard PCI system to the host PCI system. The SA-110 processor typically configures the devices on the add-in card. Alternatively, these devices and the 21285 can be configured by the host processor in the system.
The SA-110 bus must be configured for enhanced mode (SA-110 signal CONFIG is high), address pipeline enabled (SA-110 signal APE tied high), and asynchronous bus clock (SA-110 signal SnA tied low). The SA-110 bus interface and PCI interface clocks are asynchronous to each other (all synchronization is done within the 21285). However, the SA-110 bus clock frequency must always be greater than or equal to the PCI bus clock frequency.