1893Y-10LFT

Specifications Package PQFP 64 Speed NA Temperature C Voltage 3.3 V Description3.3V 10BASE-T/100BASThe 1893Y-10LFT is a low-power, physical-layer device (PHY) that supports ...

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SeekIC No. : 004212062 Detail

1893Y-10LFT: Specifications Package PQFP 64 Speed NA Temperature C Voltage 3.3 V Descr...

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Part Number:
1893Y-10LFT
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Specifications

Package PQFP 64 Speed NA Temperature C Voltage 3.3 V


Description

3.3V 10BASE-T/100BAS
The 1893Y-10LFT is a low-power, physical-layer device (PHY) that supports the ISO/IEC 10Base-T and 100Base-TX Carrier-Sense Multiple Access/Col lision Detection (CSMA/CD) Ethernet standards. The 1893Y-10LFT architecture is based on the ICS1892. The 1893Y-10LFT supports managed or unmanaged node, repeater, and switch applications.

The 1893Y-10LFT incorporates digital signal processing (DSP) in its Physical Medium Dependent (PMD) sublayer. As a result, it can transmit and receive data on unshielded twisted-pair (UTP) category 5 cables with attenuation in excess of 24 dB at 100 MHz. With this ICS-patented technology, the 1893Y-10LFT can virtually eliminate errors from killer packets.

The 1893Y-10LFT provides a Serial Management Interface for exchanging command and status information with a Station Management (STA) entity.

The 1893Y-10LFT Media Dependent Interface (MDI) can be configured to provide either half- or full duplex operation at data rates of 10 MHz or 100 MHz. The MDI configuration can be established manually (with input pins or control register settings) or automatically (using the Auto-Negotiation features). When the 1893Y-10LFT Auto-Negotiation sublayer is enabled, it exchanges technology capability data with its remote link partner and automatically selects the highest-performance operating mode they have in common.

  • Supports category 5 cables with attenuation in excess of 24 dB at 100 MHz
  • Fully integrated, DSP-based PMD includes: Adaptive equalization and baseline wander correction Transmit wave shaping and stream cipher scrambler MLT-3 encoder and NRZ/NRZI encoder
  • Low-power, 0.35-micron CMOS (typically 400 mW)
  • Single 3.3-V power supply.
  • Single-chip, fully integrated PHY provides PCS, PMA, PMD, and AUTONEG sublayers of IEEE standard
  • 10Base-T and 100Base-TX IEEE 802.3 compliant
  • Highly configurable design supports: Node, repeater, and switch applications Managed and unmanaged applications 10M or 100M half- and full-duplex modes Parallel detection Auto-negotiation, with Next Page capabilities
  • MAC/Repeater Interface can be configured as: 10M or 100M Media Independent Interface 100M Symbol Interface (bypasses the PCS) 10M 7-wire Serial Interface
  • Small Footprint 64-pin Thin Quad Flat Pack (TQFP)
  • Available in Industrial Temperature and Lead Free



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