17S40LPC

The 17S40LPC offers an easy-to-use, cost-effective method for storing Spartan device configuration bitstreams.It ge nerates a configuration clock that drives the Spartan PROM,while the Spartan device is in Master Serial mode. A shor t access time after the rising clock edge, data appears on the PROM DATA output pin that is intergrated to the 17S40 LPC DIN pin. The 17S40LPC generates the appropriate number of clock pulses to complete the configuration. Once configured,it stops the PROM.

Features of the 17S40LPC are:(1)configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for spartan, spartan-XL, and spartan-II FPGA devices;(2)simple interface to the spartan dev ice requires only one user I/O pin;(3)programmable reset polarity (active high or active low);(4)low-power CMOS floa ting gate process;(5)available in 5V and 3.3V versions;(6)available in compact plastic 8-pin DIP, 8-pin VOIC, or 20-pin SOIC packages;(7)programming support by leading programmer manufacturers;(8)design support using the xilinx alli ance and foundation series software packages.

The absolute maximum ratings and DC characteristics of the 17S40LPC can be summarized as:(1):supply voltage re lative to GND is0.5V to +7.0 V;(2):input voltage relative to GND is0.5V to VCC +0.5 V;(3):voltage applied to high-Z output is0.5V to VCC +0.5 V;(4):storage temperature (ambient) ranges from65 to +150; (5):maximum sold ering temperature (10s @ 1/16 in.) is+260.DC characteristics:(1):high-level input voltage is 2.0V min and VCC V ma x;(2):low-level input voltage is 0V min and 0.8V max;(3):high-level output voltage (IOH = 4 mA)is 3.86V min(Comm ercial);(4):high-level output voltage (IOH = 4 mA) is 3.76V min;(5):supply current, active mode (at maximum frequ ency) is-10 mA max;(6):input or output leakage current is-10uA min and 10uA max;(7):input capacitance (VIN = GND, f = 1.0 MHz) is 10 pF max.