Specifications | Input Frequency | 5 MHz to 20 MHz |
| No. of Inputs | 1 |
| Temperature | C |
| Output Frequency | Up to 200 MHz |
| Input Type | Clock,Crystal |
| No. of Outputs | 3 |
| Output Type | CMOS,PECL |
| Voltage | 5.0 V |
| Package | SOIC 16 |
| Speed | NA |
| Core Supply Voltage (VDD) | 5 V |
| Output Supply Voltage (VDDO) | 5 V |
DescriptionUSER PROGRAMMABLE GRAPH
The ICS1562B is a very high performance monolithic phase-locked loop (PLL) frequency synthesizer. utilizing IDT's advanced CMOS mixed-mode technology, the ICS1562B provides a low cost solution for high-end video clock genera-tion.
The ICS1562B hasdifferential video clock outputs (CLK+and CLK-) that are compatible with industry standard video DAC. Another clock output, LOAD, is provided whose frequency is derived from the main clock by a programmable divider. An additional clock output is available, LD/N2, which is derived from the LOAD frequency and whose modulus may also be programmed.
Operating frequencies of the ICS1562B are fully programmable with direct con-trol provided for reference divider, prescaler, feedback divider and post scaler.
Reset of the pipeline delay on Brooktree RAMDAC?s may be performed under register control. Outputs may also be set to desired states to facilitate circuit board testing.
The ICS1562B features:
Two programming options:
ICS1562B-001 (Parallel Programming)
ICS1562B-201 (Serial Programming)
Supports high-resolution graphics - CLK output to 260 MHz, with 400 MHz options available
Eliminates need for multiple ECL output crystal oscillators
Fully programmable synthesizer capability - not just a clock multiplier
Circuitry included for reset of Brooktree RAMDAC pipe-line delay
VRAM shift clock generation capability
(-201 option only)
Line-locked clock generation capability
External feedback loop capability (-201 option only)
Compact - 16-pin 0.150" skinny SOIC package
Fully backward compatible to ICS1562
1562BM-201-4LF Data Sheet
