12F629-I/P

The 12F629-I/P is a kind of PIC12F629/675. This PDF contains device specific information for the PIC12F629/675. Additional information may be found in the PIC Mid-Range Reference Manual (DS33023), which may be obtained from your local microchip sales representative or downloaded from the microchip web site. The PIC12F629 and PIC12F675 devices are covered by this Data Sheet. They are identical, except the PIC12F675 has a 10-bit A/D converter. They come in 8-pin PDIP, SOIC, MLF-S and DFN packages. Figure 1-1 shows a block diagram of the PIC12F629/ 675 devices. Table 1-1 shows the pinout description.The Reference Manual should be considered a complementary document to this Data Sheet, and is highly recommended reading for a better understanding of 12F629-I/P architecture and operation of the peripheral modules.

The features of 12F629-I/P can be summarized as (1)internal and external oscillator options - precision internal 4 MHz oscillator factory calibrated to ±1% - external oscillator support for crystals and resonators - 5s wake-up from Sleep, 3.0V, typical; (2)power-saving sleep mode; (3)wide operating voltage range 2.0V to 5.5V; (4)industrial and extended temperature range; (5)low-power power-on reset (POR); (6)power-up timer (PWRT) and oscillator start-up timer (OST); (7)brown-out detect (BOD); (8)watchdog timer (WDT) with independent oscillator for reliable operation; (9)multiplexed MCLR/input pin; (10)interrupt-on-pin change; (11)individual programmable weak pull-ups; (12)programmable code protection; (13)high endurance flash/EEPROM cell - 100,000 write Flash endurance - 1,000,000 write EEPROM endurance - flash/data EEPROM retention: > 40 years.

The absolute maximum ratings of 12F629-I/P are (1)ambient temperature under bias: -40 to +125°C; (2)storage temperature: -65°C to +150°C; (3)voltage on VDD with respect to VSS:-0.3 to +6.5V; (4)voltage on MCLR with respect to Vss: -0.3 to +13.5V; (5)voltage on all other pins with respect to VSS: -0.3V to (VDD + 0.3V); (6)total power dissipation(1): 800 mW; (7)maximum current out of VSS pin: 300 mA; (8)maximum current into VDD pin: 250 mA; (9)input clamp current, IIK (VI < 0 or VI > VDD):20 mA; (10)output clamp current, IOK (Vo < 0 or Vo >VDD):20 mA; (11)maximum output current sunk by any I/O pin: 25 mA; (12)maximum output current sourced by any I/O pin: 25 mA; (13)maximum current sunk by all GPIO: 125 mA; (14)maximum current sourced all GPIO: 125 mA.