100351

Features:

40% power reduction of the 100151
2000V ESD protection
Pin/function compatible with 100151
Voltage compensated operating range:
−4.2V to −5.7V
Standard Microcircuit Drawing
(SMD) 5962-9457901




Pinout






Specifications

If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Above which the useful life may be impaired
Storage Temperature (T_STG) −65˚C to +150˚C
Maximum Junction Temperature (T_J)
Ceramic +175˚C
V_EE Pin Potential to Ground Pin −7.0V to +0.5V
Input Voltage (DC) V_EE to +0.5V
Output Current (DC Output HIGH) −50 mA

Temperature Min	-55 deg C
Temperature Max	125 deg C
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Description

The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs (CPa and CPb) and common Master Reset (MR) input. Data enters a master when both CPa and CPb are LOW and transfers to the slave when CPa and CPb (or both) go HIGH. The MR input overrides all other inputs and makes the Q outputs LOW. All inputs have 50 kΩ

The 100351 contains six D-type edge-triggered, master/slave flip-flops with true and complement outputs, a pair of common Clock inputs (CP_a and CP_b) and common Master Reset (MR) input. Data enters a master when both CP_a and CP_b are LOW and transfers to the slave when CP_a and CP_b (or both) go HIGH. The MR input overrides all other inputs and makes the Q outputs LOW. All inputs have 50 k Ohm pull-down resistors.