Synchronized clock oscillator circuit diagram

Published:2012/7/8 21:23:00 Author:Ecco | Keyword: Synchronized clock oscillator | From:SeekIC

As shownin the figure, the controlled multivibrator iscomposed of 555 and R1, R2, C1, and the oscillation frequency is related to the RC time constant , but alsocan beadjustedby DC level of the control side. The DC level depends on the reference frequency f. After low-pass filter, the square wave is output by RS flip flop which is locked by oscillation frequency fo = Nfn output from 555. CD4001's two NOR gate circuits form the RS flip flop , when it is in a locked case , the duty cycle of the output will be kept, and thus the filtered DC level keepsconstant. If 555 oscillation frequency f0drift high(or fn reduces) , then the duty cycle will increase, thenthe DC control level will increase accordingly , frequency will decline; and vice versa.



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