Published:2009/7/7 1:12:00 Author:May | From:SeekIC
Two comparators and a summing amplifier that generate differential harmonic spectra comprise a sim-ple frequency multiplier. The resulting circuit can extract harmonics from a sine, triangle, sawtooth, or any other sloping-sided waveform. With a sloped-input waveform, a comparator produces an output pulse width that's proportional to the input amplitude plus a reference voltage. Changing the reference can vary the pulse width from 0 to 100%. As the pulse width changes, the harmonic spectrum changes, but two comparators combined in the adder eliminate harmonics, depending on the duty cycle. For example, a 50% pulse will lack all the even-num-bered harmonics. Similarly, a 25% duty-cycle pulse will be missing multiples of the fourth harmonic and deliver the second, sixth, and tenth harmonics. Accordingly, the circuit generates multiples of the input frequency that might not have existed in the input waveform. Adjusting the references can create virtually any harmonic. Because comparators A1 and A2 supply differential inputs to the added A3, the adder cancels out equal harmonics. Therefore, both A1 and A2 should have identical ac characteristics, and A3 should have good common-mode rejection and a high slew rate. In particular, R1, R2, and R3 should match within 0.1%. Of course, the accuracy of the circuit depends heavily on the amplitude stability of the input.
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