Published:2009/7/16 23:32:00 Author:Jessie | From:SeekIC
Some microcontrollers (such as the Motorola 68HC11) are implemented with a bidirectional RESET pin that can create a contention problem with the RESET output of certain supervisory ICs. If the supervisor RESET is high, for example, and the microcontroller tries to pull it low, the result might be an intermediate logic level that fails to reset the microcontroller. In addition, some devices on the RESET bus might require a RESET pulse of longer duration than the microcontroller pro-vides. IC1 in the circuit shown eliminates this concern by producing a RESET output with a mini-mum duration of 140 ms. Its RESET output becomes asserted either when the microcontroller initiates a reset, when the MR pushbutton is depressed, or when VCC dips below a threshold internal to IC1. When the reset line is pulled low by IC1 or the microcontroller, MR is pulled low and then re-turns high (initiating a timeout period of 200 ms typical) as the capacitor is charged via the internal MR pull-up resistor. 1C1's RESET deasserts following the timeout, allowing the capacitor to discharge through the internal pull-up resistor and ESD-protection diode.
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