Published:2009/6/23 2:50:00 Author:Jessie | From:SeekIC
This circuit uses negative feedback to a digital-to-time converter, and can supply a current-con-trolled delay to replace the oscillator in a phase-locked loop that handles input frequencies from 40 kHz to 40 MHz.A current sourced into the inverting input of the op-arrtp integrator's summing node can phase shift the pulses at F in relation to those at E by up to 1800.
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