Published:2009/7/13 4:12:00 Author:May | From:SeekIC
Cascading of 4192 de-cade up/down counters and use of two clocks give fully synchronous system for adding or subtracting count. Both clocks are normally held high. Low on up clock advances count. Low on down clock subtracts 1 from count. Clocking takes place on trailing or positive edge of neg-ative pulse. Parallel loading inputs are used to preset counter to any desired number. -D. Lan-caster, CMOS Cookbook, Howard W. Sams, Indianapolis, IN, 1977, p 309-310.
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