Published:2009/7/2 4:04:00 Author:May | From:SeekIC
Generates output pulse if, and only if, sequence of input pulses is in prescribed order. Any other sequence inhibits output pulse and clears circuit at instant of first out-of-order pulse. Circuit also clears itself at end of correct sequence, by generating sequence-OK pulse. Developed for use in control systems, electronic combination locks, and any other applications requiring sequence of pulses.To detect more than 4 bits in sequence, NAND gates and flip-flops can be added. If TTL input pulses occur in correct T1-T2-T3-T4 order, 1 state at U1D1 will propagate down chain of D flip-flops until U2Q2 output is reached. Simultaneously, 0 is propagated in similar manner to hold dear bus at 1. Article traces circuit operation in detaiL-M. J. Gallagher, Seff-Clearing Digital Sequence Detector, EDN Magazine, April 5, 1973, p88-89.
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