PLL_WITH_IC_TIMER

Published:2009/7/6 1:18:00 Author:May | From:SeekIC

Uses 2240 programmable timer/counter as combination voltage-con-trolled oscillator and frequency divider, with CMOS analog switches serving as sample-and-hold phase detectors. Incoming reference frequency is amplified and limited by CMOS inverter, then integrated into reference triangle waveform by R9-C2. Triangle is sampled by S1 and S2 whieh with CH1 and CH2 form cascaded sample-and-hold network that holds only last instantaneous voltage on CH1 as error voltage. This error is amplified by FET-input 3140 opamp A2 for driving pin 12 of 2240 timer as correction voltage, to establish lock. Reference and output frequencies need not have direct harmonic



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