MINIMUM_DRAIN_TIMER

Published:2009/7/12 21:42:00 Author:May | From:SeekIC

National LM122 timer is connected to reduce supply drain to zero between timing cycles. External PNP transistor Q1 serves as latch between V+ ternlinal of timer and power supply. Between timing periods, Q1 is off and no current is drawn. Arrival of 5-V or larger trigger pulse turns Q1 on forduration of timing period set by Rt and Ct, which can range from microseconds to hours. -C. Nelson, Versatile Timer Operates from Microseconds to Hours, National Semiconductor, Santa Clara, CA, 1973, AN-97, p 10.



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