Published:2009/7/12 22:57:00 Author:May | From:SeekIC
Provides time delays in selected increments of 0.5333 s with accuracy essentially that of AClinefrequency. IC1 develops 120pulses per second having 100-μs width at pins 4 and 6 for each zero crossing of line. First six stages of IC2 determine basic timing period 1T, These stages produce pulse train with periodicity of 0.5333 s at input of seventh counter stage. Binary-or-dered output signals are available at outputs ah for 1T, 2T, 4T,.. 1287. Thus, for delay of 1 min (about 1127), use 64T + 32T, + 16T with AND-gate programming interconnections e-E, f-F, and g-G. Tie all unused AND-gate inputs to VDD bus.-A. C. N. Sheng, Line-Operated Timer Couples High Apeuracies with Long Time Delays, EDN Magazine, Jan. 5, 1976, p 37-40.
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