Published:2009/6/30 22:32:00 Author:May | From:SeekIC
The circuit is composed of a relaxation oscillator formed by Q1 and an SCR flip-flop formed by Q2 and Q3. With the supply voltage applied to the circuit, the timing capacitor C1 charges to the firing point of the PUT, 2 volts plus a diode drop. The output of the PUT is coupled through two 0.02 μF capacitors to the gate of Q2 and Q3. To clarify operation, assume that Q3 is on and capacitor C4 is charged plus to minus as shown in the figure. The next pulse from the PUT oscillator turns Q2 on. This places the volt-age on C4 across Q3 which momentarily reverse biases Q3. This reverse voltage turns Q3 off. After discharging, C4 then charges with its polarity reversed to that shown. The next pulse from Q1 turns Q3 on and Q2 off. Note that C4 is a non-polarized capacitor. For the component values shown, the lamp is on for about 1/2 second and off the same amount of time.
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