Published:2009/7/20 21:54:00 Author:Jessie | From:SeekIC
FET Q2 serves as buffer for hold capacitor C1, minimizing droop error. Switching transistorQ1 is placed in feed-back loop. A1 serves as input signal buffer and as driver for Q1 and C1. When sample line is raised to +15 V by control pulse, D1 is reverse-biased and a, is turned on C1 now charges until output terminal reaches equilibrium with input (so A1 is tracking input). When sample pulse goes low, feedback loop of A1 is opened; output of A1 stays at voltage last sampled since C1 retains its charge and Q2 buffers this voltage while presenting it to output. Optional voltage follower can be used if more output current is needed to feed low-impedance load.-W. G. Jung, IC 0p-Amp Cookbook, Howard W. Sams, Indianapolis, IN, 1974, p 198-200.
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