Published:2009/7/21 23:07:00 Author:Jessie | From:SeekIC
Ultralong delay timer using two 8240 16-pin DIPs. The time base of unit 2 is disabled. The output is normally high when the system is reset. Upon application of a trigger the output goes low and stays that way for a duration of (256)2 or 65,536 cycles of the time base oscillator. Total timing cycle of the circuit is programmed from To = 256RC to To = 65,536RC in 256 discrete steps by selecting any combination of the counter outputs of unit2 (courtesy Intersil, Inc.).
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