Published:2009/7/11 2:38:00 Author:May | From:SeekIC
This circuit uses a sync-generator chip, a counter, and a decoder to detect the horizontal sync pulse that occurs at the bGginning of line 10 in field 1 of an NTSC television picture. You can use this circuit to compare the time delay between sync signals at various locations, and to determine and correct for any drift between the two master clocks.The output of the LM1881 sync separator is the key to detecting line 10; the odd/even line goes high on the leading edge of the first equalizing pulse in the middle of line 4. Thus, you can use this knowledge to find virtually any other line in the field. This particular circuit locates line 10 of field one. The circuit resets the 74LS161 counter until the odd/even line goes high. Then, 74LS161 counts the positive transitions of the sync signal. After 11 positive transitions, the sync pulse drives pin 4 of the 74LS138 decoder low, and the line-10 sync pulse appears at pin 12 of the decoder. (The circuit counts to 11, as opposed to the 6 you might expect-because the composite sync signal contains more than 1 pulse per line). The counter remains in its maximum-count state until the sync separator causes a reset because Q1 feeds the inverted terminal-count output back to the parallel-enable input.
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