Published:2009/7/25 3:34:00 Author:Jessie | From:SeekIC
With this circuit, pulse width is independent of supply voltage, and a 99% duty cycle is possible. Input trigger amplitude is set by R1, R2, R3, R4, and R10. When triggered, the output is high, causing the voltage at the noninverting input of comparator 1 to go to +VCC. This prevents any additional input pulses from disturbing the circuit until the output pulse has been completed. Pulse width is set by R6, R9, and C1.
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