Published:2009/7/24 23:35:00 Author:Jessie | From:SeekIC
This circuit is similar to that of Fig. 3-9, but it also uses the lock-detect section of the XR-2211 (Fig. 3-9C) as a carrier-detect option for FSK decoding. The lock-detect output at pin 6 is shorted to the data output at pin 7. The data output is disabled in the low state until there is a carrier within the detection band of the PLL, and pin 6 goes high to enable the data output. The minimum value of lock-detect filter capacitance CD (pins 3 and 4) can be calculated using: CD (inμF)=16/capture range in Hz. Large values of CD slow response time of the lock-detect output, and small CD values can result in chatter on the lock-detect output as an incoming signal approaches the capture-bandwidth frequency.
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