Published:2009/7/13 2:14:00 Author:May | From:SeekIC
Circuit provides delays well over 1 min even with low operating voltages of ICs. When start pulse is applied to RS flip-flop A1-A2, Q2 turns off and allows RT to provide charging current for timing capacitor CT. When voltage across CT gets high enough, Q1 turns on and resets flip-flop, terminating delay period. A3 provides buffered complementary output.-R. W. Hilsher, Long-Delay Timer, EEEMagazine, Aug. 1970, p 79.
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