Saving lighting control circuit

Published:2011/7/8 1:33:00 Author:Fiona | Keyword: Saving lighting | From:SeekIC

At time t1,the M of IC1 is in a high impedance state, VT cuts off; at the time t2, the M of IC1 outputs the negative pulse, VT conducts and outputs qualified clock signal CLK1 from VT collector. IC2 is a dual D flip-flop,it feedbacks the reversed output terminalto the data input terminal D to connect 2 divider, the data output terminal Q1 of IC2-A and clock input terminal CLK2 of IC2-B are connected to make up a 4 divider, the 4-frequency signal inputs into IC3 to do 14 divide, so that the second signal does 18 divide, the 14 divide state of the IC3 is shown in table.



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