Published:2009/7/9 23:11:00 Author:May | From:SeekIC
This circuit produces an output pulse when SW1 (pushbutton) is depressed. It also becomes a hysteresis gate oscillator. D1 and R2 add asymmetry. The DBRT (delay before repeat time) is caused by the oscillator start-up conditions: C1 has to change from zero to the upper gate threshold rather than to the lower threshold.
The auto repeat time:
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