Peak value hold circuit diagram composed of CA3130

Published:2011/5/2 7:08:00 Author:Nicole | Keyword: Peak value | From:SeekIC

As shown in the figure, it is a peak value hold circuit which is composed of CA3130. This is a positive input, positive output and negative input, negative output circuit. If the output of negative peak value hold circuit is reversed by operational amplifier, then it will be the positive output circuit, do the same treatment to positive peak value. To change C3、R1 and C6、R2, it can make the output characteristic of pulse widths in frequency band flat. When A1 input is negative singal, VD1 turns on, it can prevent A1 ring working. As the same, VD3 is used to avoid A3 ring work. To add multiple negative feedback, it can reduce the nonlinear influence of VD2 and VD4.



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