FLIP_FLOPS_CONTROL_SAMPLE_AND_HOLD

Published:2009/7/23 22:07:00 Author:Jessie | From:SeekIC

Sampled slices of incoming radar pulse are converted to binary digital form at 10-Mc rate, using flip-flop to connect sample-and- hold capacitor Cs to signal amplifiers. Effective aperture time of sample gate is 20 nsec. Multiplex gate feeds sampled signal values to analog-digital converter at proper time as selected by multiplex counter of system.-A. Hakimoglu and R. D. Kulvin, Sampling Ten Million Words a Second, Electronics, 37:8, p 52-57.



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