Published:2009/7/14 21:25:00 Author:May | From:SeekIC
Half of CD4013AE flip-flop serves as latching AND gate in each channel being monitored for vervoltage, overtemperature, or any other out-of-tolerance condition that can be represented by logic 1 level applied to terminal that connects to clock inputs of all flip-flops. Any number of additional channels can be paralleled to Gammon terminals. Each channel has own transistor driver and either LED or audio alarm. Alarm condition is held until operator resets system by applying voltage to common set terminal. Article shows how to obtain additional flexibility by adding NAND and AND gates to each select input and to common alarm input.-J. C. Nichols, CM0S D Flop Makes Latching AND Gate, EDN Magazine, April20, 1974, p 89 and 91.
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