The hit automatic acousto-optic target-reporting circuit diagram(1)

Published:2011/6/24 1:42:00 Author:Nicole | Keyword: acousto-optic target-reporting | From:SeekIC

This target-reporting circuit is composed of target ring, monostable timing circuit, acousto-optic performance circuit and depressurization rectifier circuit, the figure is as shown. IC1 adopts time base circuit 555, the trigger timing circuit is composed of IC1 and R1, target ring, R2, C1. Ordinarily, a and b are insulated, 555's 2 foot is high level(VDD), 555 is in reset state, 3 foot output is low level(<0.4V); when the target surface is hit by bullet, a, b are short circuit instantaneous, 555's 2 foot is low level(<1/3 VDD), 555 is set, 3 foot turns to high level. The high level duration time is the monostable temporary stability time, it is decided by the 2/3 VDD voltage time of C1 charges to reset, namely, td=1.1R2C1, the temporary stability time is 10s.



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