Published:2013/1/22 2:51:00 Author:Ecco | Keyword: Typical Application | From:SeekIC
The circuit provides the video sync signal for SIDl3806 display controller. These signals are required by SIDl3806 connecting LCD. ICSl523 input clock is 50 MHz ( pin 12 ), the output is CLKl ( 25 MHz), CLK2 (12.5 MHz ) and CLK3 (387.6 kHz), and they are respectively connected to S1D13806 BUSCLK ( pin 60 ), CLKl ( pin 66 ) , CLKl2 ( pin 64 ) and CLKl3 ( pin ).
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