Simple Circuit of Clock Phase Adjustment

Published:2011/6/22 7:03:00 Author:Michel | Keyword: Clock Phase Adjustment, Simple Circuit | From:SeekIC

The picture shown in picture A is a hexadecimal inverter which is used to generate 30~160NS delay.Delay time of every level is 5~35NS and its value depends on variable resistance value.Delay time of every level should not be over 12% of the clock cycle to ensure stable work. The circuit's dutyfactor can be adjusted and reaches the mininmum value by adjusting the delay levels (2 or 4) and adjusting every level resistance.It's better to adjust the shape by using an opposite phase at least at the end of the circuit before the signal entering the system. The weakness of the circuit shown in picture A is that the circuit is the signal must pass the potentiometer.



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