Published:2009/7/14 23:37:00 Author:Jessie | From:SeekIC
Timing capacitor C1 is charged by battery B1 through R1 until Q1 is forward-biased and starts conducting. When this occurs, a forward base bias is applied to Q2 through Q1 and R3. As Q2 starts conducting, a pulse is made across collector load R6, which is coupled back to Q1's base through C2 and series resistor R5. That drives Q1 to rapidly discharge C1, and then the cycle starts over. In essence, Q1 and Q2 form a high-gain amplifiers, with C2 providing positive feedback. Diode D1 reduces C2's recovery time, while R8 establishes Q1's base bias level. Thus, it is the point at which timing capacitor C1 charges before feedback and capacitor discharge are initiated. The lower Q1's initial base bias, the higher the circuit's repetition rate. Resistor R8, therefore, serves as a frequency control, providing nine octaves of coverage. The circuit will work from 5 to 25 V, but a 9-V source is optimum. Output impedance is 600Ω. A sawtooth signal suitable for use as a linear scope sweep is available across C1. For frequency-divider, sweep-generator, and time-marker uses, synchronization pulses can be applied to Q1's base through a small capacitor. The frequency range can be shifted by using other values for C1 and C2. With values of 100μF for C1 and 3μF for C2, the circuit will work down to about 1/20 Hz.
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