POSITIVE_TRIGGERED_MONOSTABLE

Published:2009/7/7 1:18:00 Author:May | From:SeekIC

A positive-going trigger pulse can be used to start the timing cycle with the circuit shown. In this design, trigger input pin 2 is biased to 6 V (1/2 VDD) by divider R1 and R2. Control input pin 5 is biased to 8 V (2/3 VDD) by the internal divider circuit. With no trigger voltage applied, point A is at 4 V (1/3 VDD). To turn the timer on, the voltage at point A has to be greater than the 6 V present on pin 2. Positive 5-V trigger pulse VI applied to the control input pin 5 is ac coupled through capacitor C1, adding the trigger voltage to the 8 V already on pin 5; this results in 13 V with respect to ground. The output pulse width is determined by the values of Rt and Ct.When voltage at point A is increased to 6.5 V, which is greater than the 6 V on pin 2, the timer cycle is initialized. The output of timer pin 3 increases, tuming off discharge transistor pin 7 and allowing Ct to charge through resistor Rt. When capacitor Ct charges to the upper threshold voltage of 8 V( 2/3 VDD), the flip-flop is reset and output pin 3 decreases. Capacitor Ct then discharges through the discharge transistor. The timer is not triggered again until another trigger pulse is applied to control input pin 5.



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