Published:2009/7/9 2:05:00 Author:May | From:SeekIC
The circuit's input op amp triggers the timer, sets its flip-flop and cuts off its discharge transistor so that capacitor C can charge. When capacitor voltage reaches the timer's control voltage of 0.33 VCC the flip-flop resets and the transistor conducts, discharging the capacitor. Greater linearity can be achieved by substituting a constant-current source for frequency adjust resistor R.
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