ONE_SHOT_TIMER

Published:2009/7/8 2:58:00 Author:May | From:SeekIC

This simple circuit consists of only two timing components RTand CT, the NE555, and bypass capacitor C2. While not essential for operation, C2 is recommended for noise immunity. During standby, the trigger input terminal is held higher than 1/3 VCC and the output is low. When a trigger pulse appears with a level less than 1/3 VCC, the timer is triggered and the timing cycle starts. The output rises to a high level near VCC, and at the same time, CT begins to charge toward VCC. When the CT vottage crosses 2/3 VCC, the timing period ends with the output falling to zero, and the circuit is ready for another input trigger. Because of the internal latching mechanism, the timer will always time out when triggered, regardless of any subsequent noise, such as bounce, on the trigger input. For this reason, the circuit can also be used as a bounceless switch by using a shorter rc time constant. A 100-KΩ resistor for RT and a 1-μF capacitor for CT would give a clean, 0.1 s output pulse when used as a bounceless switch.



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