NOISE_RESISTANT_LATCH

Published:2009/7/2 4:49:00 Author:May | From:SeekIC

False triggering of latch gates by noise spikes is prevented by generating pulse T whose width is equal to minimum width of desired input pulse. Values used for RC combination set T. If R is chosen as 10 kilohms, C should be T/3.424, where C is in picofarads and T is in nanoseconds.-S. ft. Martin, Latching Circuit Provides Noise Immunity, EDN/EEE Magazine. Feb. 1. 1972. p 56.



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