Published:2009/7/25 5:13:00 Author:Jessie | From:SeekIC
Figure 9-25 shows the ADC0816/17 connected to form a simple or minimum NAC800 interface. This circuit uses NOR gates (similar to that of Fig. 9-20), but with different control signals. When EOC goes high, the flip-flop is set and INTR goes low. When the NSC800 acknowledges the interrupt by lowering INTA, the flip-flop resets. If more than one interrupt can occur simultaneously, either INTA should be gated with EOC, or a signal other than INTA must be used. This is required because the NSC800 can detect another interrupt and clear the ADC interrupt before the ADC signal is detected. NATIONAL SEMICONDUCTOR, APPLICATION NOTE 258, 1994, P. 609.
Reprinted Url Of This Article:
http://www.seekic.com/circuit_diagram/Basic_Circuit/Minimum_NAC800_interface.html
Print this Page | Comments | Reading(3)
Code: