MULTIPLES_OF_25_MHz

Published:2009/7/4 21:19:00 Author:May | From:SeekIC

Three TTL circuits provide integral frequency-multiplication ratiosbetween1 and 8. BCD outputs of counter having modulus M are fed to inputs of 74154 4-line to16-line decoder.As outputs of counter change、at rate equal to input frequency divided by counter modulus M,each goes low at samerate Output of NAND gatethus goes high oncefor each input to gate from decoder.If 7490 decade counter is used and inputis 1 MHz,BCD outputs of 7490limit usable outputs of 74154 to lines 1,3,5,7,and 9.Since inputs to 74154 change at l00-kHz rate,output from gate will be n×100 kHz .With inρut of 25 MHz、output is integral multiple of 2.5MHz．－R .s Stein,Three TTLIC's Provide Frequency Multiplication,EON Magazine,April 5、1975、p 117 and 119.



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