Published:2009/7/15 4:45:00 Author:Jessie | From:SeekIC
Duty cycle of clock pulse is shortened by two CMOS inverters used to form negative-transition triggered mono-stable multivibrator. Duration of output pulse T is about 1.4R1C1. Output pulse occurs each time input clock goes from high to low. Used with foldback current limiting for short-circuit protection in clock-driven regulated power supply. Low duty cycle of dock pulses ensures positive full-load starting of supply.-J. L. Bohan, Clocking Scheme Improves Power Supply Short-Circuit Protection, EDN Magazine, March 5, 1974, p 49-52.
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