Low_power_10_bit_A_D_converter_1

Published:2009/7/22 22:31:00 Author:Jessie | From:SeekIC

This circuit is similar to that of Fig. 6-6, except that no external clock is required and typical quiescent power consumption is about 100 μA. Also, the additional ±1 LSB uncertainty of the Fig. 6-6 circuit is eliminated when the flip-flop shown in dashed lines is used. To calibrate, adjust the 50-kΩ pot for 1024 counts with 5.000 V at the input.



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