INVERTING_SAMPLE_AND_HOLD

Published:2009/7/20 22:09:00 Author:Jessie | From:SeekIC

Total offset error can be adjusted to much less than 1 mV in 2N5545 FET-input opamp by using compensation circuit R3-C2-C3 with DG181 JFET analog switch. Switch operation occurs consistently at constant voltage, reducing aperture time jitter. Designed for high-speed sample-and-hold requirements.- Analog Switches and Their Applications, Siliconix, Santa Clara,CA,1976,p7-59.



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