HIGH_VOLTAGE_PULSE_DELAY

Published:2009/7/15 2:36:00 Author:Jessie | From:SeekIC

Diode input network isolates base of Q1 from input when input pulse voltages exceed maximum rated emitter-to-base reverse voltage of input inverting digital pulse delay circuit.-R. A. Karlin, One-Transistor Multi Delays Digital Pulses, Electronics, 38:17, p 85-86.



Reprinted Url Of This Article:
http://www.seekic.com/circuit_diagram/Basic_Circuit/HIGH_VOLTAGE_PULSE_DELAY.html

Print this Page | Comments | Reading(3)