HIGH_SPEED_FIFO

Published:2009/7/5 20:27:00 Author:May | From:SeekIC

Design is based on Motorola MC10143 register file, with each IC holding 8 words by 2 bits, Circuitincludes write and read enable inputs for cascading two register file packages to memory depth of 16 words. Full master-slave flip-flop operation allows simultaneous read and write. Reset is applied initially to drive both address counters to empty state.To enter data, write clock input is enabled with negative-going pulse. Write addressing is controlled by MC10178 binary counter. Used for stack registers of computing systems when register outputs are read sequentlally in sameorder that data wad entered(first-in first-out).-B.Blood, A High Speed FIFO Memory Usingthe MECL MC10143 Register Fil, Motorola,Phoenix,AZ,1974,AN-730,p 5.



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