FOUR_PHASE_12_MC_CLOCK

Published:2009/7/11 2:48:00 Author:May | From:SeekIC

To minimize litter of synchronizing signals, fundomentcd frequency is chosen at one-eighth of dock rate or 1.5 Mc. Oscillator output is fed through two doubler stages and split into three channels, each having additional doubler followed by power amplifier, to provide low output impedance at any reasonable power level.-G.O. Olson, Design of High-Frequency Clock Pulse Generators, Electronics, 32:35, p56-57.



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