Eliminating_input_gain_adjustments

Published:2009/7/25 4:43:00 Author:Jessie | From:SeekIC

Figures 9-8 and 9-9 show the ADC0816/17 connected to eliminate gain adjustments on the analog input signals. This is done by varying the ADC REF+ and REF- voltages to get various full-scale ranges Typically, the reference voltages can be varied from 5 V to about 0.5 V to accommodate various input voltages. However, there is a restriction: the center of the reference voltage must be within 10.1 V of mid-supply. The reason for this restriction is that the reference ladder is tapped by an N-channel or P-channel MOSFET switch tree (Fig. 9-1), Offsetting the voltage at the center of the switch tree from VCC2 causes the transistors to turn off at the wrong point, resulting in inaccurate and erratic conversions. However, if properly applied, this method can reduce parts count and eliminate extra power Supplies for the input buffers. In the supply-centered reference circuit of Fig. 9-8, R1 and R2 offset REF+ and REF- from VCC and ground. An LM336-2.5 is shown, but any reference betueen 0.5 V and 5 V can be used. For odd reference values, use the op-amp circuit of Fig. 9-9. Single-supply op amps, such as the LM324 or LM10, can be used. R1, R2, and R3 form a resistor divider in which R1 and R3 center the reference at VCC2 and R2 can be varied to get the proper reference magnitude. NATIONAL SEMICONDUCTOR, APPLICATION NOTE 258, 1994, P. 595.



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