DRIVERS_FOR_SHIFT_REGISTER

Published:2009/7/16 3:37:00 Author:Jessie | From:SeekIC

Inverter Q3 pulses 300-ma drivers Q1 and Q2 and feeds 100-nsec delay line that provides time for shift register stages to reach final values in new stale.-B. K. Ericksen and J. D. Schmidt, Random Pulse Generator Tests Circuits, Encodes Messages, Electronics, 34:25, p 56-59.



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