DIGITAL_SAMPLE_AND_HOLD

Published:2009/7/20 21:22:00 Author:Jessie | From:SeekIC

When strobe input is applied, RC low-pass network between reset and trigger inputs of Exar XR-2240 programmable timer/counter resets and then triggers timer, sets output of bistable latch to high state, and activates counter. Circuit generates staircase voltage at opamp output. When stair-case level reaches that of analog input to be sampled, comparator changes state, activates bistable latch, and stops count. Opamp output voltage level then corresponds to sampled analog input. Sample is held until next strobe signal. Minimum recycle time is about 6 ms. Sup-ply voltage can be 4-15V.- Timer Data Book, Exar Integrated Systems, Sunnyvale, CA, 1978, p11-18.



Reprinted Url Of This Article:
http://www.seekic.com/circuit_diagram/Basic_Circuit/DIGITAL_SAMPLE_AND_HOLD.html

Print this Page | Comments | Reading(3)